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Enterprise Java Research Library
sponsored by Adveda
Posted:  10 Feb 2004
Published:  01 Jan 2004
Format:  HTML
Length:  1  Page(s)
Type:  Product Overview
Language:  English


ABSTRACT:
Miss Univers is the Marvelous Integrated System Simulator of AdvEDA’s Unified verification solutions. Miss Univers is a complete HW/SW co-verification tool for multi-processor SOC architectures, offering extensive debug capabilities, fast simulation and emulation support. It includes an RTL simulator as well as a multi-core IDE with most fascinating debug features and configurable user-friendly graphical user interface.




BROWSE RELATED RESOURCES
Debuggers | Debugging | Design Verification | Integrated Development Environments | Simulation and Analysis Software | SOC (System on a Chip)

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BROWSE RELATED PRODUCTS: 
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